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DFM Based layout
Signal and power integrity : S-parameter, TDR and eye diagram
Power plane analysis : Z-parameter
IR drop check
High speed and high parallel by using test interface board with unique TSE’s TRE technology onto existing ATE facility.
Development Experience - Application : FPGA, XOR, FOB, Power Boost Module
Perfect high parallel interface technology to maximize customer test productivity.
Development Experience - Up to 960Para
High speed and high performance memory device test with TSE advanced high-speed interface integration technology.
Development Experience - Up to 20Gbps
Multi layer, ultra fine pitch product through prior technology development for PCB design & Fab.
Development Experience - Up to 0.2mm
Test Interface Solution for extreme temperature environments.
- Automotive
- Military
- Medical